Maximize performance and get the maximum benefits of the STM32F7 in your next design with detailed application notes that provide tips on how to optimize your application in terms of code partitioning using the ARM® Cortex®-M7 STM32F7’s smart architecture:
- STM32F7 Series system architecture and performance (AN4667)
- Floating point unit demonstration on STM32 microcontrollers (AN4044)
- Digital signal processing for STM32 microcontrollers using CMSIS (AN4841)
Thanks to its many hardware accelerators and bus architecture, the STM32F7 is the best fit for embedded applications demanding high-processing and real-time response capabilities. While the STM32F7 also offers the possibility of an unlimited extension of code size thanks to the cacheable Dual-mode Quad-SPI interface, determinism in embedded applications is sometimes just as important as absolute performance.
The STM32F7’s scattered RAM includes system RAM as well as TCM RAM. The TCM RAM has 16 Kbytes of Tightly-Coupled Memory for Instructions (ITCM) and up to 128 Kbytes of Tightly-Coupled Memory for Data (DTCM), which are both cache-less memories directly connected to the STM32F7 core. These TCMs are very well suited to host critical data or code sections where determinism is a must. The proper use of the cache for performance and the TCM RAM for determinism enables customers to cover a wide variety of application needs.